I have two question:
1st: What should I do if I wannt to change the zarlink gp2015 RF front-end chip into another one, for example the NJ1006AH/AK(Nemerix), STA5620(ST), SE4110L(SiGe). the same point of these chips is that they all have mag, sign and clock for the baseband part. but the IF frequence of them is 4.188/4.092MHz and clock is 16.368MHz, which is different from gp2015, 1.405MHz and 40MHz. I have read the verilog code of tracking module, there are some questions:
1)should I still use 40MHz, which will not be supply by RF front-end, for the tracking module using other RF front-end chip, even though the IF is 4.188/4.092MHz.
2)the frequence of "sample_enable" in accumulator.v is 5.714MHz, which is the same as the sample clock output to the gp2015 for a/d sample. but in other RF front-end chip, the a/d sample clock is 16.368MHz, so should I still use 5.714MHz sample_enable in accumulator.v if I change the gp2015?
2nd: the value of mag and sign is not mentioned in gp2015 datasheet and STA5620(ST), SE4110L(SiGe), I have read the verilog code and found sign 0 is -ve and 1 is +ve, I also read gp2021 datasheet and found it just show the truth table of mag and sign without +ve or -ve, so how do you know the sign of this input signal?
I guess it is unchangeable algorithmic of a/d transform and the value of the sign and mag is fixed. but when I saw NJ1006AH/AK(Nemerix), it sign is opposite to our code, that means its sign 0 is +ve and 1 is -ve, so I am lost...:CCC
thanks very much