Namuru II



The new NAMURU V2 GPS Receiver is described below. This version is built on the same principles as the V1B receiver with several extra features including the added ability to receive both L1 and L2 GPS signals. This fully functional L1 and L2 GPS receiver design can provide a number of channels of parallel satellite tracking, up to the limit of the logic capacity in the Cyclone 2C50 FPGA. With 2 RF downconverters, the board can be used to receive either the L1 and L2 GPS signals, or both channels can be used to receive the L1 signal from 2 separate antennas. Both RF downconverters use the same 10MHz TCXO reference.


  • L1 and L2 signal receiving capability, or just dual L1 antennas
  • Larger FPGA - Altera Cyclone 2C50 providing extra memory & LE's
  • Fast USB 2.0 12 Mbit and 480 Mbit interface
  • Larger memory - 64-Mbyte SDRAM for data & program storage
  • Larger 64 MBit serial flash for FPGA image & CPU code
  • 12 bit, 6 channel A to D converter (50Ksps)
  • Optional 3D Accelerometer
  • Optional 2D Gyro

The NAMURU V2 GPS Receiver board.

All GPS receiver functions including the CPU are embedded in the Altera Cyclone 2C50 FPGA. The receiver is constructed on a multi-layer printed circuit board. The outputs from the receiver are available through RS232 and USB interfaces as described below.
The block diagram below (Figure 1) shows the main receiver board functions.

Figure 1


GENERAL: L1 frequency (1575.42MHz)
L2 frequency (1227.6MHz)
TIM-TO-FIRST-FIX (TTFF) Cold start: 110 seconds
Warm start: 45 seconds
Hot start: 11 seconds
Re-Acquisition after loss <2 seconds
Data out: NMEA 0183 V2.01 with GGA, RMC, GSV & GSA
Update rate: 1 per second
RTCM Differential corrections: RTCM-SC104 Msg types 1, 2 & 9-3

Note: These are typical target values, yet to be confirmed on this platform.


FPGA Altera Cyclone II EP2C50F484C8 with EPCS64 64-Mbit flash serial configuration device
IO J3 & J9 - RS232 channels up to 115KB
J7 - 32 pin general purpose header (3.3 volt only)
J2 - JTAG FPGA programming & diagnostic port
J1 - ASMI Serial flash programming port
J4 - USB 2.0 Fast 480 MB/s
32K Bytes NV SRAM (battery backed)
SWITCHES & LEDS S1 - System Reset button
2 General purpose LEDs
J6 - 4 User option jumpers (scope points)
TIMING DS1338 clock chip w/Battery backup
CLOCKS 10MHz TCXO reference oscillator
40MHz FPGA clock (LVDS feed from L1 RF front end chip)
40MHz FPGA clock (LVDS feed from L2 RF front end chip)
Internal 80MHz CPU clock from FPGA PLL
J13 - External LVDS input to FPGA global clocks
EXTERNAL CLOCK J8 - External 10MHz clock input 3.3V p-p
RF DOWNCONVERTERS 1575.42MHz GPS L1) using GP2015
1227.6MHz GPS L2) using GP2015
ANALOG INPUTS J12 - 0 to 3.0 Volts (6 channels, 50K sps, 12 bits)
ACCELEROMETER (Option) 3 Axis KXP74-1050 +/- 2.0g range
GYRO (Option) 2 Axis IDG-300 +/- 500 Deg. per sec.
ANTENNA CONNECTORS J10 - MCX 50 ohm GPS L1 channel 0
J11 - MCX 50 ohm GPS L1 channel 1
J5 - MCX 50 ohm GPS L2 channel 1
POWER J14 - 7 to 9 Volts DC @ 550mA max. with no active antennas connected
SIZE 170mm x 98mm
WEIGHT 105 Grams


The NAMURU Version 2 receiver (410V2A) as described above is supplied as a fully working GPS receiver development kit. Technical details can be downloaded from this site, see below.

The supplied kit contains the following:

  • Fully working GPS Receiver board.
  • The source for all documents, L1 GPS source code and Quartus projects.
When you purchase the receiver kit, you are given access to the full source code and information as follows:
  • Namuru GPS receiver schematic diagrams.
  • Verilog source code for the FPGA logic design (correlators and peripherals)
  • C source code for the GPS receiver software for acquiring and tracking the satellites.
  • Four Quartus II working project examples that you can use as reference designs.
  • NIOS II component interface code to all peripherals.
  • PC based software to monitor the receiver (requires MS Windows)


To work with this development kit you will need a copy of the Altera FPGA development tools used in the design of this receiver as follows:

  • The Altera Quartus II FPGA development package which includes logic synthesis, place & route, timing analysis, signal trace facilities and many more. This is a feature rich system providing the designer with a very integrated platform to go from HDL source to the silicon. The web edition can be downloaded FREE from Altera.

  • The NIOS II integrated Development Environment (IDE) based on the well known Eclipse platform that many software developers are familiar with. This allows the compilation and debugging of C and C++ source code for the NIOS embedded CPU. This is also available from the Altera website free of charge.

  • An FPGA download cable called a "Terasic blaster" purchased from Tarasic's web site HERE, or a "USB Blaster" purchased from Altera's website HERE

Note: The FREE version of the Altera software tools will allow you to fully develop and debug your Namuru system, but you must keep the JTAG download cable connected between your PC and the Namuru board. To generate code to use the Namuru receiver in "stand-alone" mode, you must purchase a full license from Altera.


We have chosen not to ship the receiver with a power supply for 2 reasons: firstly the mains voltage and plug systems vary greatly between countries and secondly it keeps the shipping weight down.

You will therefore need a 9 DC power supply at up to 550mA with no antennas connected. Typically 490mA with two active antennas connected. Power input is connected to the board through a 2 mm (centre positive) jack, J14. A typical plug pack power supply that will deliver up to 500mA is normally OK.

If you don't use a plug pack, you will need to make up a power cable to connect to your power source.

You need a 50 ohm GPS band (L1 or L2 antenna with a built in LNA of 26dB gain. A typical antenna is the AT575-127 or AT575-112 series made by Aeroantenna

You will need to supply your own antenna and cables.

You need a PC running MS Windows XP or later to run a small windows application to interpret and display the collected GPS data. The PC serial port is connected directly to J3 on the NAMURU board to collect GPS data from the receiver. You will need to make up a cable to connect the Namuru serial port J3 to your PC. A USB cable is supplied.
Also you will need to run the Altera Quartus II tools on the PC. From here you will download any new logic and software that you may develop from the PC USB port to the NAMURU, using either the Terasic Blaster or the USB Blaster as described above. The blaster is connected to the JTAG port on the NAMURU board at J2.


The standard receiver is supplied without the 3 Axis Accelerometer and the 2 Axis GYRO fitted because these are not generally required by all users. At the time of ordering either or both of these options can be requested by selecting the product code from the following table:

GPS410V2A Receiver with NO accelerometer or GYRO
GPS410V2A-AC Receiver with 3 axis Accelerometer
GPS410V2A-GY Receiver with 2 axis GYRO
GPS410V2A-IMU Receiver with Accelerometer and GYRO


The Namuru V2 GPS receiver is in stock and shipping now.


We ship by FedEx International Priority. This allows you and us to track the shipment online.
Shipping weight is approximately 0.5 Kg
Shipping package dimensions are 170mm x 250mm x 60mm


You can ONLY order online using our web based ordering service.
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  1. Create an account, enter your billing and shipping address details
  2. Place your order using our online ordering service
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  7. After payment is received, your shipment will be dispatched
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Technical information is available from our download section. Please click HERE

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